| abstract |
A method of manufacturing a non-planar field effect transistor is provided. The manufacturing method includes a step of preparing a bulk substrate 1 having an initially flat front surface, a plurality of shallow trench isolation (STI) structures provided on the front surface of the substrate, and a plurality of fin structures 2 between the STI structures. The upper surface of the STI structure to be defined and the upper surface of the fin structure are in contact with a common plane, and the side wall 21 of the fin structure is sufficiently hidden by the STI structure, above the central portion of the fin structure and above the common plane. Forming a dummy gate structure, forming a dielectric spacer structure around the dummy gate structure, removing the dummy gate structure, and forming a gate trench defined by the dielectric spacer structures 6 and 7; Removing the top of the at least two STI structures and exposing at least a portion of the sidewalls of the fin structure in the gate trench; Comprising the step of forming the final gate stack in the switch. [Selection] Figure 8 |