| abstract |
A mounting structure that reduces mechanical stress applied to a low-k material due to warpage caused by a difference in thermal expansion coefficient between a chip and a chip support during mounting is realized. Such a mounting structure includes a Low-k layer formed on a semiconductor substrate, an electrode layer formed on the Low-k layer, and on the Low-k layer and the electrode layer. A protective layer having an opening reaching the electrode layer, a first solder layer formed by filling the opening on the electrode layer in the opening, and a first solder layer formed on the first solder layer A second solder layer having a smaller elastic modulus and a support layer that supports the semiconductor substrate by connecting to the second solder layer, and the protective layer is formed by an underfill layer formed between the protective layer and the support layer. However, the elastic modulus is large and the thermal expansion coefficient is small. [Selection] Figure 5 |