http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2014167842-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_0950e9df7f0e1b73efee1bda859951ad |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C29-00 |
| filingDate | 2013-02-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6af373fa77fa0f85939015c2c7e4b487 |
| publicationDate | 2014-09-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2014167842-A |
| titleOfInvention | Semiconductor memory device and controller thereof |
| abstract | To improve the use efficiency of a storage area. A semiconductor memory device includes a memory cell array and a control circuit that controls data access to the memory cell array. The memory cell array 111 includes a plurality of blocks, each of the plurality of blocks being stacked on the semiconductor substrate and connected in series, and a plurality of blocks connected respectively to the gates of the plurality of memory cell transistors. A word line. When a word line short defect occurs in the block, the word line in the block is divided into a plurality of areas for management. [Selection] FIG. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11461044-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2019169206-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2014186761-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-6991084-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-113764018-A |
| priorityDate | 2013-02-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 20.