http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2014082696-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_ac8ea4f652c51209833279712f81831b |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04L7-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04L25-38 |
| filingDate | 2012-10-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7bdf5cbf30793e39a9116f95269a70a8 |
| publicationDate | 2014-05-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2014082696-A |
| titleOfInvention | Serial communication device |
| abstract | An object of the present invention is to further reduce the error of the period of a generated synchronous clock. In a serial communication device for determining a cycle of a synchronization clock based on repeated synchronization bits of 0, 1 of 2 n bits (n is a positive integer of 2 or more) in received data, When the measurement value of the reference pulse number corresponding to the whole period is obtained, and the obtained measurement value is divided by the number of bits of the synchronization bit over the whole period to obtain the quotient Q and the remainder R, and subsequently receiving data For the bit position immediately before the bit position corresponding to the remainder R in the received data, the time of the reference pulse number corresponding to the quotient Q is the period of the synchronous clock, and the bit position corresponding to the remainder R For subsequent bit positions, the time of the reference pulse number corresponding to the quotient Q + 1 is set as the period of the synchronous clock. [Selection] Figure 1 |
| priorityDate | 2012-10-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 40.