http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2014060489-A
Outgoing Links
Predicate | Object |
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assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_2ed0897e087fa147bc2eb075dbc8b9c1 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03M1-66 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03M1-08 |
filingDate | 2012-09-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_71157848a6f155f1648cbcc932a77468 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4b1d0b9545c2ae79629b9e8175007266 |
publicationDate | 2014-04-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | JP-2014060489-A |
titleOfInvention | D / A converter and A / D converter using the D / A converter |
abstract | A D / A converter that can reduce the influence of noise of a negative power supply voltage generated by a charge pump circuit, which is used for a second reference signal Vref_L. A digital unit that inputs a digital signal, an input signal based on the input digital signal, a plurality of capacitors 111p_1, 111p_2, 111n_1, and 111n_2 that hold and transfer the sampled signal, and a plurality of capacitors A sampling circuit 160 including a sample and hold unit 150b including switching elements 151p_1, 151p_2, 151n_1, 151n_2, 153n_1, 153n_2, 102_1, and 102_2, and a continuous unit 150a that outputs the transferred signal as an analog signal; A clock signal supply unit 159 that supplies a first clock signal φI to the continuous unit and a second clock signal φS3 and φS4 to the sample and hold unit is provided. [Selection] Figure 14 |
isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9444489-B2 |
priorityDate | 2012-09-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 17.