http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2014056992-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b19eaa8e535da4e4bceed99917a68153 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-16225 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-73204 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-07811 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-32225 |
| classificationIPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01B5-16 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-60 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-31 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-29 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01R11-01 |
| filingDate | 2012-09-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a284a688377b6fb336abe5b61e285a7b http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2776701f1d85155bdfb28c9dd9afe869 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_df5efa2b5ef6930cc10668527c76ef9a |
| publicationDate | 2014-03-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2014056992-A |
| titleOfInvention | Electronic device and method for manufacturing electronic device |
| abstract | An electronic device in which metal materials are selectively agglomerated between terminals without electrically leaving the metal material in a resin component and the terminals are electrically connected to each other, and the electronic device is manufactured. A method for manufacturing an electronic device is provided. In a semiconductor device, a conductive connection sheet including resin composition layers and a metal layer is disposed between a semiconductor chip (electronic component) and an interposer (opposing electronic component). By the connecting portion 81 formed by heating in the above state, the terminal (first terminal) 21 included in the semiconductor chip 20 and the terminal (second terminal) 41 included in the interposer (counter electronic component) 30 are formed. The semiconductor chip 20 has a terminal region (first terminal region) 411 and a non-terminal region (first non-terminal region) 412, and the non-terminal region 412 includes: A dummy terminal (first capturing means) 22 for capturing the unnecessary metal layer 12 is provided. [Selection] Figure 3 |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-109786340-A |
| priorityDate | 2012-09-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 214.