http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2014017931-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_2ed0897e087fa147bc2eb075dbc8b9c1 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H02M3-155 |
| filingDate | 2012-07-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_92e442eac20dafac84d0b72df1d6dfed |
| publicationDate | 2014-01-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2014017931-A |
| titleOfInvention | DC-DC converter |
| abstract | A DC-DC converter capable of preventing an output current from becoming an overcurrent is provided. In a DC-DC converter that is a synchronous rectification type SEPIC, a control circuit CC that outputs a control signal for controlling on / off to MOS transistors Nch and Pch includes a current i flowing through a coil L S during a charging operation of the coil. the current value of the LS, either the current value i LL of the current flowing through the coil L L is, when it becomes larger than a predetermined reference voltage Vref1, the overcurrent protection circuit for outputting a determination signal indicating that the increased And the MOS transistor Nch is turned off according to the determination signal. When the output of the current-voltage converter S S exceeds Vref1, CMP1 outputs a low. The AND circuit AND1 outputs low, and the PWM signal generation circuit PWMSG turns off the MOS transistor Nch. [Selection] Figure 5 |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2019123912-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2022249227-A1 |
| priorityDate | 2012-07-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 17.