| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02D10-00 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-0016
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-096
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7869
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K3-0375 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1368
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-092
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-08
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234 |
| filingDate |
2013-08-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a8f459e84a266a2b55cb89281ebfe85f
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6295192012e7b0ed39e88002b8734a2d |
| publicationDate |
2014-01-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-2014017500-A |
| titleOfInvention |
Semiconductor device |
| abstract |
In a logic circuit that performs clock gating, standby power is reduced or malfunction is suppressed. A logic circuit includes a transistor that is turned off in a state where a potential difference exists between a source terminal and a drain terminal over a period in which a clock signal is not supplied. The channel formation region of the transistor is formed using an oxide semiconductor with a reduced hydrogen concentration. Specifically, the hydrogen concentration of the oxide semiconductor is 5 × 10 19 (atoms / cm 3 ) or less. Therefore, leakage current of the transistor can be reduced. As a result, standby power of the logic circuit can be reduced and malfunction can be suppressed. [Selection] Figure 1 |
| priorityDate |
2009-10-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |