| abstract |
A processor with reduced power consumption is provided. In particular, a processor in which power consumption is reduced by reducing leakage current from a high-potential power supply line is provided. A processor circuit used in a power gating driving method is used only in an arithmetic processing period, a first circuit block including a logic circuit, and the arithmetic processing period, a data saving period, and a data restoration period. The first circuit block is divided into a second circuit block including a volatile memory element and a third circuit block including a nonvolatile memory element used only for the data saving period and the data recovery period. First to third high-potential power lines are connected to the first to third circuit blocks, respectively, and these high-potential power lines are fourth high-potential power lines that supply power to the processor via a switch. And electrically connected. [Selection] Figure 1 |