| abstract |
A semiconductor device in which power consumption is reduced by preventing a malfunction due to a voltage drop due to an increase in wiring resistance, a delay in signal transmission, a rounded signal waveform, and a decrease in reliability. A gate wiring is formed of a conductive layer containing copper, and a signal wiring formed of a part of the same conductive layer as a source electrode and a drain electrode is formed of a part of the same conductive layer as the gate wiring. By electrically connecting with the wiring in series or in parallel, the wiring resistance of the signal wiring is substantially reduced without increasing the width and thickness of the signal wiring. [Selection] Figure 1 |