http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2013156944-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c35838c28939068148ca5277a9e38396 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_0950e9df7f0e1b73efee1bda859951ad |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F12-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-099 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-093 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-085 |
| filingDate | 2012-01-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a7aa3911e4bd54323b63942003ecdbd3 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_46fe1058fbf9d16506b98329785bd784 |
| publicationDate | 2013-08-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2013156944-A |
| titleOfInvention | Semiconductor memory device |
| abstract | A semiconductor memory device having a signal generation unit capable of easily changing operation settings at low cost. A storage unit 31 includes a semiconductor memory. The PLL circuit 49 generates a signal for controlling the storage unit 31. The register 50 holds information for setting the frequency of the PLL circuit 49. The restart circuit 51 restarts the PLL circuit 49. The control unit 44 sets information in the register 50 and supplies a start signal to the restart circuit 51, and the restart circuit 51 restarts the PLL circuit 49 based on the information set in the register 50. [Selection] Figure 1 |
| priorityDate | 2012-01-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 36.