http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2013065665-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-285 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-49 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-108 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8242 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-12 |
| filingDate | 2011-09-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bbc08ddc6d66d2b1382be7470af1e3cf http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fa08dd1ce9b0d4cda7b7aef3d0448f94 |
| publicationDate | 2013-04-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2013065665-A |
| titleOfInvention | Semiconductor device and manufacturing method of semiconductor device |
| abstract | A semiconductor device using a material that does not contain silicon in a channel region, in which a gate leakage current is suppressed even when a gate insulating layer is thinned with miniaturization. A thermally oxidized silicon layer is used as a gate insulating layer. By using a thermal silicon oxide layer, gate leakage current can be suppressed more than when a silicon oxide layer formed by a CVD method or a sputtering method is used. In order to use the thermally oxidized silicon layer for the gate insulating layer, a silicon substrate is prepared separately from the substrate on which the semiconductor layer including the channel region is formed, and the thermally oxidized silicon layer is formed on the silicon substrate. Then, the thermally oxidized silicon layer is attached to the semiconductor layer including the channel region. In this manner, a thermally oxidized silicon layer is formed over the semiconductor layer, and a transistor using the thermally oxidized silicon layer as a gate insulating layer is formed. [Selection] Figure 1 |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2019212327-A |
| priorityDate | 2011-09-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 68.