| abstract |
A novel logic circuit that retains data even when power is cut off is provided. In addition, a novel logic circuit capable of reducing power consumption is provided. A logic circuit is configured by electrically connecting a comparator that compares two output nodes, a charge holding unit, and an output node potential determination unit. Thus, a logic circuit that retains data even when the power is turned off can be obtained. In addition, the total number of transistors included in the logic circuit can be reduced. Further, by stacking a transistor using an oxide semiconductor and a transistor using silicon, the area of the logic circuit can be reduced. [Selection] Figure 1 |