Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_fdf3b6ced3d7710ec0bc0addb67a1cc9 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K3-356008 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C19-184 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C19-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-124 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1255 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1214 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-00 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/C23C14-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-105 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-108 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8242 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C19-28 |
filingDate |
2012-05-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_70bdd27f5768d41155e2b47f3974172b |
publicationDate |
2012-12-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
JP-2012256412-A |
titleOfInvention |
Semiconductor memory device |
abstract |
Provided is a semiconductor memory device that does not need to save and restore data between a volatile memory device and a nonvolatile memory device in a configuration for stopping and resuming supply of power supply voltage. When a nonvolatile semiconductor memory device is formed, a volatile memory device and a nonvolatile memory device are configured without being separated. Specifically, a semiconductor memory device has a structure in which data is held in a data holding portion connected to a transistor and a capacitor each including an oxide semiconductor in a semiconductor layer. The potential held in the data holding unit is a data potential holding circuit that can output data without leaking charges and the potential held in the data holding unit without leaking charges by capacitive coupling via a capacitive element. It is controlled by a controllable data potential control circuit. [Selection] Figure 1 |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2015207997-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2016139800-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2012257210-A |
priorityDate |
2011-05-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |