http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2012202722-A

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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-822
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-04
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filingDate 2011-03-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7d8e2d2d7250c08985703a3821920b00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7575a53c13649841371705a1a8f9f442
publicationDate 2012-10-22-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2012202722-A
titleOfInvention MOS transistor integrated circuit and MOS transistor deterioration degree simulation calculation system
abstract In a ring oscillator in a MOS transistor integrated circuit, when the period of use becomes longer, the characteristics of the MOS transistor constituting the ring oscillator deteriorate, and the oscillation period becomes longer. Accordingly, it is necessary to quantitatively grasp the degree of deterioration, but there has been no conventional technique for calculating the degree of deterioration of a MOS transistor for each individual integrated circuit. In a MOS transistor integrated circuit 1 in which a ring oscillator 2 is integrated, a ring oscillator 4 configured to cause only deterioration of an NMOS transistor and a ring oscillator 5 configured to generate only deterioration of a PMOS transistor are formed. Based on the current oscillation period or the initial oscillation period of manufacture, the simulated calculation device 7 calculates the increased delay time and the oscillation period due to deterioration. [Selection] Figure 1
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2017118414-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-112834890-B
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priorityDate 2011-03-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 26.