http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2012182702-A

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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F1-24
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K17-22
filingDate 2011-03-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8514d874092232f8d6be786762735bd8
publicationDate 2012-09-20-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2012182702-A
titleOfInvention Reset circuit and semiconductor device
abstract PROBLEM TO BE SOLVED: To output an initial value of an initialization target logic circuit to a subsequent logic circuit even in a clock gating state. A reset circuit that resets a logic circuit that operates in synchronization with a clock receives an output signal of the logic circuit, an initial value of the output signal when the logic circuit is reset, and an output signal received from the logic circuit An output selection unit that outputs one of the following: a control unit that receives a reset signal for resetting the logic circuit and controls the output selection unit so that an initial value is output from the output selection unit in response to the reset signal; have. [Selection] Figure 1
priorityDate 2011-03-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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