http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2012142599-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_294881271413951a95f284b588a68e66 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_9a9aad45e5465bd5d3e7e503b2b16c65 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8242 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-108 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 |
| filingDate | 2012-03-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a168e2ccc21795b430173856cef9d7e7 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5ef651429a0c3a9ce3adfbfad318a70b |
| publicationDate | 2012-07-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2012142599-A |
| titleOfInvention | Semiconductor device and manufacturing method thereof |
| abstract | An object of the present invention is to suppress over-etching of an element isolation insulating film and an impurity diffusion layer in a contact structure having a large aspect ratio in an LSI device in which DRAM cells and logic are mixedly mounted, thereby suppressing junction leakage. A first etching stopper layer 121 covering a peripheral MOS transistor and a second etching stopper layer 122 are formed on the capacitor portion of the DRAM memory cell. The impurity diffusion layer 113 of the peripheral MOS transistor includes first and second impurity diffusion layers. The electrode layer 131 that penetrates the etching stopper layers 121 and 122 is connected to the metal wiring layer formed in the upper layer of the capacitor portion, and at least one of the impurity diffusion layers 113 is on the boundary of the element isolation insulating film 102. The depth dimension from the surface of the impurity diffusion layer 113 at the bottom of the electrode layer 131 formed on the element isolation insulating film 102 is formed so that the junction depth dimension of the impurity diffusion layer 113 is shorter. . [Selection] Figure 1 |
| priorityDate | 1999-10-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 29.