http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2011216134-A

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filingDate 2010-03-31-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_960c577898977119c291c15b3e35f481
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publicationDate 2011-10-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2011216134-A
titleOfInvention Nonvolatile semiconductor memory and method for writing to nonvolatile semiconductor memory
abstract A peripheral circuit of a non-volatile semiconductor memory is reduced and contributes to the reduction of an integrated circuit. An n-type diffusion layer formed on a p-type substrate and connected to a source line, a word electrode provided on the p-type substrate and connected to a word line, a p-type substrate, A word insulating layer provided between the word electrodes 200, a tunnel insulating layer provided on the n-type diffusion layer 50 and on the side wall of the word electrode 200, a charge storage layer provided on the tunnel insulating layer, A control insulating layer provided on the storage layer; and a control electrode 300 provided on the control insulating layer and connected to the control line 420. When the controller performs writing to the memory element 600, the source line A non-volatile semiconductor memory that applies a positive voltage to 430, applies a negative voltage to the word line 400, and applies a positive voltage to the control line 420. [Selection] Figure 1
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9244714-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2018107300-A
priorityDate 2010-03-31-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 23.