http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2011134851-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_47cc435e1d443f13180f7766df104d9d |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-18165 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48624 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-3025 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48247 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-181 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05624 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48091 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-45144 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-45 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-56 |
| filingDate | 2009-12-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_494d883a0131ab109ee63f32bb3e8246 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7cdcf669408d90b3e87d343b3ff8fb80 |
| publicationDate | 2011-07-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2011134851-A |
| titleOfInvention | Semiconductor device, manufacturing method thereof, wiring substrate for connecting semiconductor device, wiring board for mounting semiconductor device, and manufacturing method thereof |
| abstract | PROBLEM TO BE SOLVED: To provide a semiconductor device having excellent connection reliability and excellent metal layer retention reliability. In a semiconductor device including a conductive metal layer pattern to which a semiconductor element is connected and sealed with a sealing material, the conductive metal layer pattern has a thickness opposite to the semiconductor element connection surface. A semiconductor device that is partially protruding in the direction and exposed. The connection between the semiconductor element and the conductive metal layer pattern is a wire bonding connection between a predetermined position of the semiconductor element and the conductive metal layer pattern, and these are sealed with a sealing material. The lower surface of the semiconductor element is exposed. is doing. It is preferable that the maximum width portion of the cross-sectional shape of the conductive metal layer is buried in the sealing material. [Selection] Figure 9 |
| priorityDate | 2009-12-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 108.