http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2011023419-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_063a1b324005ddc15e16e7529c6258c4 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
| filingDate | 2009-07-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_97fb8b962cb1d69c7026149666b5d48a |
| publicationDate | 2011-02-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2011023419-A |
| titleOfInvention | Manufacturing method of semiconductor device |
| abstract | A manufacturing process of a semiconductor device including a multilayer wiring structure is simplified. A method of manufacturing a semiconductor device includes a step (a) of forming an insulating film 102 on a substrate 101, a step (b) of forming a hard mask film 103 on the insulating film 102, and a step on the hard mask film 103. The step (c) of forming the first oxidized region 110 by anodic oxidation by bringing the first mold 108 into contact with the second mold 111 is brought into contact with the second mask 111 on the hard mask film 103 and second by anodic oxidation. A step (d) of forming the oxidized region 112, a step (e) of forming the hard mask 103a by removing the first oxidized region 110 and the second oxidized region 112, and etching using the hard mask 103a as a mask. (F) forming a connection hole 104 and a wiring groove 105 in the insulating film 103. The first oxidized region 110 and the second oxidized region 112 have different areas and depths. [Selection] Figure 1 |
| priorityDate | 2009-07-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 33.