http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2010272750-A

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filingDate 2009-05-22-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6c454ce0daa59447f1a067f63f18039d
publicationDate 2010-12-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2010272750-A
titleOfInvention Nonvolatile semiconductor memory device
abstract A nonvolatile semiconductor memory device capable of suppressing variations in the coupling ratio of a control gate included in a memory cell is provided. A non-volatile semiconductor memory device is formed on a semiconductor substrate at a constant interval in a first direction, extends in a second direction orthogonal to the first direction, and has an upper surface lower than the upper surface of the semiconductor substrate. An element isolation insulating film 11 that separates the substrate into a plurality of element regions 12, a tunnel insulating film 14 formed on the element region 12, a charge storage layer 15 formed only on the tunnel insulating film 14, and a charge storage It was continuously formed in the first direction on the layer 15 and the element isolation insulating film 11, and on the element isolation insulating film 11, the bottom surface was formed on the block layer 16 and the block layer 16 lower than the surface of the semiconductor substrate. And a gate electrode. [Selection] Figure 1
priorityDate 2009-05-22-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 23.