| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_294881271413951a95f284b588a68e66 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-49175
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-014
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01079
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48472
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01078
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01074
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48091
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-45144
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01033
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48095
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01029
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-4809
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01028
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01015
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-14
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48096
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01013
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01006
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01005
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01004
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05554 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-01 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-60 |
| filingDate |
2009-01-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_413a7c30ca17113f4d2992e427696453 |
| publicationDate |
2010-07-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-2010161222-A |
| titleOfInvention |
Semiconductor package manufacturing method, semiconductor package, and semiconductor chip |
| abstract |
A method for manufacturing a semiconductor package, a semiconductor package, and a semiconductor chip are provided that reduce the time for electrically connecting a chip-side electrode and a package substrate-side electrode to a high productivity. A peeling layer is formed between a semiconductor chip and a wiring layer formed on the semiconductor chip, and the peeling layer is peeled off when the package is assembled. Part is peeled off from the semiconductor chip 3, and the peeled wiring layer 6 is folded around the edge of the semiconductor chip 3 around the bonding part with the semiconductor chip 3 and connected to the electrode 2 on the semiconductor chip 3 side. One end of a wiring 6 that electrically connects the electrode 4 and the electrode 2 on the substrate 1 side can be collectively connected to the electrode 2 on the substrate 1 side by side. [Selection] Figure 1 |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-103262671-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-103262671-B
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2012053129-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2012156590-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8931166-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2014204275-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2012160595-A |
| priorityDate |
2009-01-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |