http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2009522706-A

Outgoing Links

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filingDate 2006-12-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 2009-06-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2009522706-A
titleOfInvention Alternative sensing technology for non-volatile memory
abstract The present invention provides a memory cell sensing scheme. The selected memory cell is discharged through the channel to ground and then has a voltage level across the conventional source and another voltage level across the control gate to charge the cell bit line. The bit line of the memory cell is then charged until the bit line voltage is high enough to block any further cell conduction. Depending on the data state of the cell, the bit line voltage rises to a certain level and then the memory cell threshold affected by the substrate effect reaches the point where the current is essentially cut off. When the bit line reaches a sufficiently high level, the cell is blocked. Certain embodiments perform a plurality of such sensing sub-operations, using different control gate voltages in each operation, and states of each operation by charging already discharged cells through their sources. Perceived.
priorityDate 2005-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

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Total number of triples: 21.