| abstract |
A nonvolatile semiconductor memory device capable of suppressing interference between memory cells is provided. In a NAND memory 1, a tunnel insulating layer 12, a charge storage layer 13, and a charge block layer 14 are provided on a surface of a semiconductor substrate 11, and a plurality of control gates are provided on the surface along a channel length direction. Electrodes 15 and inter-cell insulating films 16 are alternately provided. Then, chlorine is introduced into a portion 14 b corresponding to the region immediately below the inter-cell insulating film 16 in the charge blocking layer 14, and the dielectric constant of the portion 14 b is changed to that of the portion 14 a corresponding to the region immediately below the control gate electrode 15 in the charge blocking layer 14. Lower than the dielectric constant. [Selection] Figure 1 |