http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2009267267-A

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_44b2ac87aeadb161b83426d9cf6c4bdc
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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-46
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-66
filingDate 2008-04-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d2ecdcd0586cbc57088ce80e18be076e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_979bd436498d87fd0eae235f57039e6b
publicationDate 2009-11-12-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2009267267-A
titleOfInvention Electronic component mounting device
abstract The present invention provides an electronic component mounting apparatus that can be further reduced in size by reducing the product area while securing the product area and that has excellent heat dissipation characteristics. A semiconductor-embedded substrate includes a semiconductor device that is embedded in a substrate that is a stacked body of a plurality of insulating layers. The semiconductor device 10 has test electrodes Ea and Eb for resistance measurement evaluation, and these test electrodes Ea and Eb are electrically connected to each other and are not terminated (terminated), in other words. They are not connected to the conductor layers 30, 32, and 34 and are embedded in the substrate 20 in an electrically isolated state. [Selection] Figure 3
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2011146513-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101085752-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8547132-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2019122335-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-6991572-B2
priorityDate 2008-04-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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