http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2009260615-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5d7576285d411d00c697e07270d2814a |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-0185 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-20 |
| filingDate | 2008-04-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_30ce2918ee5323e5c67a768b80254eae |
| publicationDate | 2009-11-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2009260615-A |
| titleOfInvention | Level conversion circuit and image display device |
| abstract | In a level conversion circuit using a single conductivity type transistor, a level conversion circuit capable of suppressing an increase in power consumption even if the number of signals to be level-converted increases is provided. The level conversion circuit includes unit level conversion circuits LS1 and LS2 for converting levels of mutually complementary input signals INS1 and INS2, respectively. The unit level conversion circuit LS1 activates the final output signal / OUTS1 based on the input signal INS1 of the unit level conversion circuit LS1, and deactivates it based on the signal from the unit level conversion circuit LS2. The unit level conversion circuit LS2 activates the final output signal / OUTS2 based on the input signal INS2 of the unit level conversion circuit LS2, and deactivates it based on the signal supplied from the unit level conversion circuit LS1. [Selection] Figure 1 |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2014514687-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2014045478-A |
| priorityDate | 2008-04-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 33.