| abstract |
A delay associated with encoding a convolutional code or a turbo code is reduced. A method and apparatus for encoding multiple bits in parallel, wherein the output is recursively generated. During each clock cycle, the encoder processes multiple bits to produce an output that is consistent with the output generated sequentially over multiple clock cycles in a conventional convolutional encoder. In one embodiment, input data is stored in a plurality of memory storage units, each of which is then uniquely addressed to provide the data to the parallel encoder. [Selection] Figure 14 |