http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2009158622-A

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filingDate 2007-12-25-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_aaa4327ba6013134f5a238b10c43e2c3
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publicationDate 2009-07-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2009158622-A
titleOfInvention Semiconductor memory device and manufacturing method thereof
abstract The present invention provides a NAND flash memory semiconductor memory device with improved operating characteristics, and a manufacturing method thereof for implanting impurities into an active region side wall. A first active region in which a memory MOS transistor is disposed, a second active region in which a peripheral MOS transistor is disposed, and a first active region formed in a semiconductor substrate and exposing the first active region on a sidewall. A trench 43, an insulating film filling the first trench 43, a first element isolation region that electrically isolates adjacent first active regions, and a second active region formed in the semiconductor substrate 10 on the side wall And a second element isolation region 35 that includes an insulating film 27 that fills the second trench 43 and electrically isolates adjacent second active regions. The impurity concentration of the region is higher than that of the central portion, and the impurity concentration of the first active region AA is equal to that of the central portion. [Selection] Figure 6
priorityDate 2007-12-25-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 35.