| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_ec3af9072cf2cdc7a99f55c1775f8091 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2207-2227 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-222
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1057
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1084
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1051
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4074
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4093
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1066
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4076 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-4093
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F12-00 |
| filingDate |
2007-12-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b93420254afa57f409bf102dd4132e50
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_842ce45988fe6c516ea6e90f0bd2624d |
| publicationDate |
2009-07-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-2009146541-A |
| titleOfInvention |
System device and method of operating system device |
| abstract |
PROBLEM TO BE SOLVED: To minimize power consumed in accessing a semiconductor memory according to the access status of the semiconductor memory. A semiconductor memory has an internal circuit that operates according to a first power supply voltage and a memory input / output circuit that operates according to a second power supply voltage, and operates in synchronization with a clock signal. The first control unit has a control input / output circuit that is connected to the memory input / output circuit and operates according to the second power supply voltage to access the semiconductor memory, and operates in synchronization with the clock signal. The voltage generation unit changes the second power supply voltage according to the voltage adjustment signal. The clock generation unit changes the frequency of the clock signal according to the clock adjustment signal. The second control unit generates a voltage adjustment signal and a clock adjustment signal in order to optimize the power consumption of the semiconductor memory according to the access state of the semiconductor memory by the first control unit. [Selection] Figure 2 |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-5596143-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2015036965-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2015053106-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2012098837-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2012001917-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-6974549-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9898403-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2014063279-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2013520759-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9256376-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2019092080-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2011142566-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10838887-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9405671-B2 |
| priorityDate |
2007-12-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |