http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2009116967-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_ec3af9072cf2cdc7a99f55c1775f8091 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F11-1032 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C29-42 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-401 |
| filingDate | 2007-11-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_174044fb7a074175a4c2b28fafc4df14 |
| publicationDate | 2009-05-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2009116967-A |
| titleOfInvention | Semiconductor memory, semiconductor memory operating method and system |
| abstract | PROBLEM TO BE SOLVED: To shorten an access cycle time of a semiconductor memory having an error correction function. During a write operation, an error in regular data read from a regular memory cell is detected and corrected using parity data. A part of the corrected regular data is replaced with write data, and new parity data is generated. When the write command is continuously supplied, after reading of the regular data is started, reading of the parity data from the parity memory cell is started during the reading of the regular data. Furthermore, while new parity data is being supplied to the parity memory cell, reading of the regular data from the regular memory cell is started in response to the next write command. Thereby, the access cycle time of the semiconductor memory can be shortened. [Selection] Figure 6 |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9164834-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2010146645-A |
| priorityDate | 2007-11-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 36.