| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_38ed56a4b4e8e2315b2b3308bffedb3f
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_cef1f43aa7ea51e6a592082d9f2a3103
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c16d2144a81bfa32a665dca1e93c3d37 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-82345
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823462
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-8238
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823842
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823857
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-092 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-283
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-49
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423 |
| filingDate |
2008-10-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f4f830c9b63c9e04869d723c5797fd5d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3c4827aa583e31828d6385b7cd54f579 |
| publicationDate |
2009-05-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-2009111380-A |
| titleOfInvention |
Dual work function semiconductor device and manufacturing method thereof |
| abstract |
Dual and easy to manufacture, reliable, without increasing the complexity and cost of the intrinsic manufacturing process when forming a dual metal gate with one or two dielectrics in manufacturing a CMOS A method of manufacturing a semiconductor device having a work function is provided. A simple method of manufacturing a dual work function device starting from one metal electrode and the device are disclosed. A single metal single dielectric (SMSD) CMOS integration scheme is disclosed. A dielectric stack comprising a gate dielectric layer 1 and a dielectric cap layer 2 and a dielectric cap layer 2 ″ and a metal layer covering the dielectric stack are first formed to form a metal-dielectric Form an interface. After forming the dielectric stack and the metal layer, at least a portion of the dielectric cap layer 2 ″ adjacent to the metal-dielectric interface is selectively modulated by adding a work function modulating element 6. [Selection] Figure 2b |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8004044-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2011014614-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8440521-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-5368584-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8258582-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2011077536-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2011023738-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8552507-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-4602440-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2009302260-A |
| priorityDate |
2007-10-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |