http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2008298735-A

Outgoing Links

Predicate Object
assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_fd83260a96356882b5f50dd097411a72
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-04
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-822
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-28
filingDate 2007-06-04-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_99b49d52c96072edea93dfb1d46808ea
publicationDate 2008-12-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2008298735-A
titleOfInvention Integrated circuit
abstract A malfunction is prevented when a plurality of integrated circuits mounted on a burn-in test board undergo a burn-in test at the same time. This malfunction is caused by a voltage drop in the power supply of the entire burn-in test board. Further, the drop in power supply voltage depends on the total amount of current consumed simultaneously by all integrated circuits in the burn-in test. An integrated circuit according to the present invention individually changes the execution order of a plurality of subprograms included in a burn-in test program. In this way, the current consumption during the burn-in test is leveled, and the voltage drop in the power supply of the entire burn-in test board is suppressed. As a result, malfunction in the burn-in test is prevented. [Selection] Figure 1
priorityDate 2007-06-04-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Predicate Subject
isDiscussedBy http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID458391465
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID23976

Total number of triples: 15.