http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2008276938-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36d1d9c59848bff6ad5f55923d1290f5 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F15-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F12-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F12-00 |
| filingDate | 2008-07-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_db999cea0e70b1c7ee19556e6b9d8832 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_97210d0863c73a67595d8b49540e3ce5 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f0960e4b7ae045fe9b7c84849e157eee http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f6b1175792505d3b61d65cecf64be439 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_723097db30d44c71544012960f3e50c5 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_90780d1e0ed3f593c40a88944268b5f5 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0880b3d625b2bd9baed6ad843183ffe7 |
| publicationDate | 2008-11-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2008276938-A |
| titleOfInvention | Microcomputer |
| abstract | The present invention improves the usability of a flash memory built in a microcomputer. A microcomputer of the present invention comprises a CPU, an I / O port, a flash memory, and a random access memory on a single semiconductor chip. The flash memory is divided into a plurality of batch erasable storage areas, stores a rewrite control program and a transfer control program, and has a control register for setting an operation state such as erasing / writing. The control register includes a bit for instructing an erase operation, a bit for instructing a write operation, a bit for instructing a verify operation, and a bit for designating a storage area to be erased, and are controlled by the CPU. The CPU executes the transfer control program to transfer the rewrite control program to the random access memory, and further executes the transferred rewrite control program to write the prepared data to the flash memory. [Selection] Figure 1 |
| priorityDate | 2008-07-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 23.