http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2008251154-A

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filingDate 2008-04-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8bb4440fc6f0612b9e6442cc61581a5d
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publicationDate 2008-10-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2008251154-A
titleOfInvention Nonvolatile semiconductor memory device
abstract Nonvolatile semiconductor memory capable of executing normal read operation of a nonvolatile memory array responding to a read command and a read address while performing an automatic data read operation from a specific address of the nonvolatile memory array Providing equipment. A nonvolatile semiconductor memory device includes a nonvolatile memory array and a control circuit. In response to a read command and a read address from the outside, the control circuit 120 executes a normal data read operation from the nonvolatile memory array 121 and outputs the normal read data to the outside. In response to a specific signal PRE supplied from the outside when the power is turned on, the control circuit 120 executes an operation of automatically reading data from a specific address (address 0) of the nonvolatile memory array, and from this specific address The automatic read data was output to the outside. [Selection] Figure 1
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2020123023-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2015022777-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2010152472-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2013137744-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2020135656-A
priorityDate 2008-04-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 28.