http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2008235385-A

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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-739
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78
filingDate 2007-03-19-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e7b7f275007aaa9ab4d9374a927967ec
publicationDate 2008-10-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2008235385-A
titleOfInvention Semiconductor device and manufacturing method thereof
abstract A semiconductor device having a top gate structure capable of reducing the thickness of the epitaxial silicon layer before the polishing step and a method of manufacturing the same when epitaxially forming a semiconductor silicon layer (cathode layer) necessary for the top gate structure Offer. The cathode layer and the layer deposited on the substrate insulating films 5-1 and 5-2 in the first and third openings 3 and 4 formed in the initial insulating film 2 on the surface of the one conductivity type semiconductor substrate In the semiconductor device having a top gate structure in which a gate electrode is provided via a gate insulating film 8 on the surface of the other conductivity type base region 10 sandwiched between the surface of the one conductivity type emitter region 11 and the surface of the one conductivity type region 7 therein. A third opening 4 is provided in the initial insulating film 2 at a position sandwiching the one opening 3, and the third opening 3 is buried at a height similar to the film thickness of the initial insulating film 2. The semiconductor device includes the one-conductivity type semiconductor crystal layer 7 and an interlayer insulating film 12 covering the surface of the layer. [Selection] Figure 2
priorityDate 2007-03-19-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 19.