| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-08
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8244
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-092 |
| filingDate |
2007-04-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8d1d89c208fb2fe90cf9e5d70bf49684
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ce029ff26482bfaa8d1e0cc0b338b2b8
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_21747acfb77b0d181ab4dff0d66658d4 |
| publicationDate |
2007-09-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-2007227955-A |
| titleOfInvention |
Semiconductor device |
| abstract |
A technique for effectively suppressing leakage current is provided. A first region having a P-channel TFT on a substrate having an insulating surface, wherein an impurity element imparting P-type is added to a region overlapping with a gate electrode of an active layer of the P-channel TFT. And an active layer of the P-channel TFT has an N-type second region provided so as to surround the first region. In this way, a region having a high barrier in energy can be formed at a place where a current path is likely to occur, thereby preventing leakage current (short channel leakage). [Selection] Figure 12 |
| priorityDate |
1996-07-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |