| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_fd83260a96356882b5f50dd097411a72 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05096
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01014
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01015
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05599
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01005
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-02166
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01006
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-3025
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01004
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05093
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-00014
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01033
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-14
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-13091
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-85399 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-03
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-05
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L22-32 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-60 |
| filingDate |
2005-10-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e807fee6cc7b9def2c4477c8810afe34 |
| publicationDate |
2007-05-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-2007123303-A |
| titleOfInvention |
Semiconductor device |
| abstract |
An object of the present invention is to provide a semiconductor device that is particularly excellent in pressure resistance against a bonding pad and realizes high integration by disposing an element under the bonding pad. A semiconductor device according to the present invention includes a substrate on which an element is formed, a lowermost wiring layer including a plurality of rectangular wirings stacked on the substrate and arranged in parallel along the same direction; A bonding wiring layer capable of being bonded on the lowermost wiring layer. In the semiconductor device according to the present invention, in particular, by setting the line width of the rectangular wiring in the lowermost wiring layer and the width of the insulating film filled between the rectangular wirings on the upper surface of the semiconductor device. The insulating film supports the mechanical stress caused by the probe needle applied to the bonding pad to be formed. [Selection] Figure 2B |
| priorityDate |
2005-10-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |