| abstract |
PROBLEM TO BE SOLVED: To reduce power consumption of a signal processing circuit by reducing a calculation amount of detection processing of a position of a pixel receiving ID light in a photographed image. When determining an ID reception position by detecting a low-frequency pilot signal superimposed on ID light, each pixel using an evaluation function including a fast Fourier transform operation over a plurality of image frames. It is determined whether or not the pixel is an ID reception pixel by comparing the evaluation value of (1) with a threshold value (S4, S5). A multi-layer binning image with different resolutions is created (S2). The process of determining the ID reception pixel, narrowing the range, and determining the ID reception pixel from a higher resolution binning image is repeated. As a result, the number of target pixels for which evaluation values are calculated is significantly reduced as compared with the case where hierarchization by binning is not performed, and the number of times of execution of evaluation value calculation is reduced, so that power consumption can be reduced accordingly. [Selection] Figure 7 |