http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2006338070-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_577cc195d07315682b3c17f3f3d95576 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G05B19-05 |
| filingDate | 2005-05-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1ab3a93ea4ec739491eebb9464d35fd4 |
| publicationDate | 2006-12-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2006338070-A |
| titleOfInvention | I / O processor |
| abstract | Provided is an I / O processor that can directly access an input and output by a ladder program and can perform high-speed processing, and can cope with a large system by the same I / O processor. In an I / O processor 1 having a logic solver 2 that performs a 1-bit operation as a coprocessor of a CPU, a reversible counter 3 that counts encoder pulses that can be directly accessed from an operation unit of the logic solver 2, and a pulse PWM output circuit 4 that performs D / A conversion by width modulation, and a timing clock generation circuit that supplies a clock signal CK and a sampling pulse signal SAMP to the serial input SI and serial output SO that are input / output ports in the I / O processor 1 6 is provided. [Selection] Figure 1 |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2021174653-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-102476716-B1 |
| priorityDate | 2005-05-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 16.