http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2006331584-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36d1d9c59848bff6ad5f55923d1290f5 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-30 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C8-10 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F12-16 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F1-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F1-26 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F15-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-06 |
| filingDate | 2005-05-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_58f1f1dc42063d885d8f42bf7b952590 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6b8ea8445cf3b58ea0100117f33edae3 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3da79103df4317fcf9874ccf3bec21f0 |
| publicationDate | 2006-12-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2006331584-A |
| titleOfInvention | Semiconductor integrated circuit and microcomputer |
| abstract | PROBLEM TO BE SOLVED: To provide a technique for preventing an element from being deteriorated or damaged due to power interruption. A memory unit (22) in which electrically rewritable nonvolatile memory cells are arranged in an array, and a high voltage generation circuit (23) capable of generating a high voltage supplied to the memory unit. And a semiconductor memory (FMRY). A power supply circuit (71) for generating a power supply voltage for operation of the semiconductor memory and a power supply from the power supply circuit to the semiconductor memory after the output voltage level of the high voltage generating circuit is lowered. Control circuit (70). By stopping the power supply from the power supply circuit to the semiconductor memory after the output voltage level of the high voltage generating circuit is lowered, the element is prevented from being deteriorated or damaged due to power interruption. . [Selection] Figure 1 |
| priorityDate | 2005-05-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 22.