http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2006185948-A
Outgoing Links
Predicate | Object |
---|---|
assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6e1661dee8910168027fa5b3390d0e65 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3205 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-304 |
filingDate | 2004-12-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_906a5fb15d9b14ac7f2e43102f2db1a3 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0832d08ecce58cead0e7f91cd9b768c6 |
publicationDate | 2006-07-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | JP-2006185948-A |
titleOfInvention | Semiconductor element manufacturing method and manufacturing apparatus |
abstract | PROBLEM TO BE SOLVED: To provide a semiconductor element having a high quality wiring film with little variation in thickness at low cost. A method of manufacturing a semiconductor element, wherein a wiring film having a predetermined pattern is formed by polishing a substrate having a barrier film layer and a conductor wiring film layer provided on the barrier film layer, A polishing step in which a predetermined pattern of wiring film is formed by polishing the conductor wiring film layer by supplying a predetermined abrasive; A conductor wiring film layer component supply step for supplying the conductor wiring film layer component at a time before and after the lower barrier film layer of the conductor wiring film layer starts to be exposed in the polishing step; |
priorityDate | 2004-12-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 18.