Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c5520dd38cc403678d9f91e0b0ee95fb |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-0289 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G2310-04 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/F24F13-15 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3688 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G09G3-3677 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/F24F7-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/F24F13-0245 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09G3-36 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-133 |
filingDate |
2004-03-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3a3b8ebd502b42ab8de45645ec256e6a http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a703c1b3850b268d2925fdbe43b50c83 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9ecc56d8f8a5eaf0b82108e96c652c05 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b596004489b12854b2427ff27c85275e http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_159292a04dc09b8c03d6179681355a17 |
publicationDate |
2005-09-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
JP-2005266177-A |
titleOfInvention |
Display device drive device, display device, and display device drive method |
abstract |
PROBLEM TO BE SOLVED: To provide a display device drive device, a display device, and a display device drive method capable of reducing power consumption due to a reactive current of a level shifter. A plurality of flip-flops that operate in synchronization with a source clock signal, and a level shifter that boosts a source clock signal having an amplitude smaller than the driving voltage of the flip-flop and applies the boosted voltage to each flip-flop. A data signal line driving circuit that includes a shift register that transmits an input pulse in synchronization with a source clock signal and outputs an image display data signal to a plurality of data signal lines, and a frequency of the source clock signal SCK when displaying an image And a control circuit (see FIG. 1B) that is larger than that during normal display (FIG. 1A) in which multi-gradation display is performed in the full color mode. [Selection] Figure 1 |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-102254537-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-102254537-B http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2004227751-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-105118456-B http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-105118456-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-4683523-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-4762251-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2007322649-A |
priorityDate |
2004-03-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |