http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2005229506-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_be055db3c1a09879df07379ba969e223 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K5-00 |
| filingDate | 2004-02-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_02abf6dfa86b32d422ba9b33842e310e |
| publicationDate | 2005-08-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2005229506-A |
| titleOfInvention | Clock supply circuit |
| abstract | PROBLEM TO BE SOLVED: To provide a clock supply circuit having a gated clock function and capable of suppressing clock skew caused by deterioration of a transistor over time. An AND gate 31 allows a clock signal CLK1 to pass when a given control signal N41 is 1, and blocks a clock signal CLK1 otherwise. The enable signal control circuit 41 outputs a fixed value 1 when the burn-in signal BTEST indicates that burn-in is in progress, and passes the enable signal EN otherwise. Therefore, during burn-in, the clock signal CLK propagates on the clock path to the end regardless of the value of the enable signal EN. Accordingly, since the deterioration of the buffer included in the clock supply circuit progresses uniformly during burn-in, clock skew caused by the deterioration of the transistor during burn-in can be suppressed. [Selection] Figure 1 |
| priorityDate | 2004-02-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 31.