http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2004503165-A
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K17-063 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-0963 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-00 |
| classificationIPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K17-06 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-096 |
| filingDate | 2001-07-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2004-01-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2004503165-A |
| titleOfInvention | Apparatus for resonant logic and low power digital integrated circuits |
| abstract | The present invention provides a system for controlling asynchronous data transfer inside a circuit. The system operates by monitoring a first voltage level on a first conductor that determines whether a first stage of the circuit contains data. The system also monitors a second voltage level on the second conductor to determine whether the second stage of the circuit contains data. A first voltage level indicates that the first stage contains data to be transferred to the second stage and a second voltage level detects that the second stage does not contain data. If so, it makes available to receive data from the first stage, and the system transfers data from the first data to the second stage. [Selection diagram] FIG. |
| priorityDate | 2000-07-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 43.