| abstract |
A semiconductor integrated circuit device having a decoupling capacitance does not require a dedicated arrangement area for providing a decoupling capacitance, and is easy to manufacture. A back surface of an N-type silicon substrate (NSub) is connected to a power supply terminal, a P-type epitaxial layer (PEpi2) is formed on the entire surface of the N-type silicon substrate (NSub), and an element formation section (2) is provided thereon. The element forming section 2 is provided with a P-type epitaxial layer PEpi1 and an interlayer insulating film 3, and an N-well NW and a P-well PW are formed on the surface of the P-type epitaxial layer PEpi1. Then, the P-type epitaxial layer PEpi2 is connected to the ground terminal via the P-type epitaxial layer PEpi1, the P well PW, the p + diffusion region PD5, the via V11, and the wiring W11. As a result, a pn junction is formed at the interface between the P-type epitaxial layer PEpi2 and the N-type silicon substrate NSub, and the capacitor C1 is formed. [Selection diagram] Fig. 1 |