http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2004038276-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_38520f366e74704305b34fb93a81121e |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-00323 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F1-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F1-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-003 |
| filingDate | 2002-06-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1b254131f6cafa807a1831958362e80e |
| publicationDate | 2004-02-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2004038276-A |
| titleOfInvention | Clock signal supply circuit |
| abstract | Provided is a clock signal supply circuit that suppresses a decrease in operation speed due to variations in various conditions, and that causes a small decrease in performance under worst-case conditions. A clock signal CLK is supplied to FFs 21 and 22 at the preceding stage of a logic circuit block 12 having the longest processing time via delay buffers 41 and 42 each having a capacitor as a delay element. The clock signal CLK is supplied via delay buffers 43 and 44 which use a buffer formed by the same transistor as the logic circuit block 12 as a delay element. If the processing time of the logic circuit block 12 increases due to a change in the operating environment and the output of data as a processing result is delayed, the timing of the clock signal supplied to the FFs 23 and 24 is also delayed due to the same change in the operating environment and the like. Therefore, the FF 23 can receive the processing result of the logic circuit block 12 even if the operating environment or the like changes. [Selection diagram] Fig. 1 |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2009113238-A1 |
| priorityDate | 2002-06-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 51.