http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2003242793-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_be055db3c1a09879df07379ba969e223 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2207-2281 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-22 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-065 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-22 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C7-06 |
| filingDate | 2002-02-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2737cc2a41e26b952ca50e0b1e6a3eae http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2f0c6a878573d5bed68dcdb8fb291671 |
| publicationDate | 2003-08-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2003242793-A |
| titleOfInvention | Nonvolatile semiconductor memory device and data reading method thereof |
| abstract | [PROBLEMS] To read data from a memory cell accurately even in a dynamic sense type nonvolatile semiconductor memory device using a differential sense amplifier circuit, even if the start timing of the sense amplifier circuit is delayed. SOLUTION: A memory cell 1 is connected to a bit line BL0 by a word line WL, and a reference memory cell 2 is connected to an opposite bit line B by a reference word line RWL. L1 and the bit line BL0 and the opposite bit line BL. When the data of the memory cell 1 is read out by amplifying the potential difference of the memory cell 1 by the sense amplifier SA, at the beginning of the data read-out, the precharge circuit 4 uses the two bit lines BL0, BL 1 are both precharged to a predetermined potential, and after this precharge or after the end of the precharge, the same amount of current is supplied to the bit line BL0 and the anti-bit line BL1 by the bit line current supply circuit 3. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2007164842-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2010009668-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2004039226-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9224487-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2012084225-A |
| priorityDate | 2002-02-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
| Predicate | Subject |
|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID7156993 http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID426135032 |
Total number of triples: 25.