http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2003198122-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_01c1e0bc0628f76dea731cda5a666ca1 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-46 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-38 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K1-09 |
| filingDate | 2001-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1ff192c6a2a94fea73a0dd25775a4537 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a4952705b249b94e7844a7257d29db0d http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0e312009cdcde31c9bc59802f87757bb |
| publicationDate | 2003-07-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2003198122-A |
| titleOfInvention | Manufacturing method of wiring board |
| abstract | PROBLEM TO BE SOLVED: To form a circuit composed of fine wiring firmly adhered on a substrate excellent in smoothness while preventing the deterioration of the circuit shape in an etching process, and to improve the insulation characteristics between the wirings. Provided is a method for manufacturing a wiring board, which can be ensured. SOLUTION: A step of forming a metal layer on a substrate by a physical vapor deposition method, a step of forming a via penetrating through the substrate and the metal layer, and an electroless plating method on the metal layer and an inner surface of the via. A step of forming a conductive layer by a coating method, a step of removing the conductive layer while leaving the conductive layer on the inner surface of the via, and a step of forming wiring by electrolytic plating on the metal layer and the conductive layer on the inner surface of the via, A printed wiring board is manufactured by a modified semi-additive method containing More preferably, the metal layer comprises a first and a second metal layer, and the conductive layer is removed by selective etching of the second metal layer. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-102473640-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2011151961-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8815334-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2011249718-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2013089779-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7629045-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7862889-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2013089780-A |
| priorityDate | 2001-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 94.