http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2003142610-A

Outgoing Links

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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-115
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filingDate 2001-11-07-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_93c540d308876da2d06524ec1a32d54f
publicationDate 2003-05-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2003142610-A
titleOfInvention Nonvolatile semiconductor memory device and charge injection method thereof
abstract [PROBLEMS] To efficiently inject high-energy charges from the entire surface of a region where a channel is formed even at a low voltage. A first semiconductor layer made of a first conductivity type semiconductor, a potential barrier layer in contact with one surface in a thickness direction of the first semiconductor layer, and a first semiconductor layer with the potential barrier layer interposed therebetween. A second semiconductor layer SUB facing the second semiconductor layer, and a plurality of dielectric films laminated on the other surface of the first semiconductor layer opposite to the second semiconductor layer, the gate dielectric including a charge storage means therein. A film GD, a gate electrode WL opposed to the first semiconductor layer via the gate dielectric film, and two sources formed on a part of the first semiconductor layer on both sides of the gate electrode and made of a second conductivity type semiconductor -It has drain regions BL and SL.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2004349311-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2007534161-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-4480955-B2
priorityDate 2001-11-07-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 26.