| abstract |
[PROBLEMS] To provide a highly reliable semiconductor chip and a method for manufacturing the same. Two layers of interlayer resin insulation layers 50 and 150 are provided. Due to the difference in coefficient of linear thermal expansion between the IC chip 20 and the external substrate 300, when a force in the height direction is applied to the copper plating post 260, the force is applied to the die pad 22 via the two-stage filled via 160 and filled via 60. , The stress is attenuated. For this reason, the semiconductor circuit formed on the IC chip 20 is not damaged. |